With the objective to create an interactive platform where our followers can receive more detailed information about our products and the people behind our products, I’ll introduce our team of software engineers.
Today we’ll meet Yves Maumary, PhD, our Software Design Manager for the Digitizer Components group of Keysight’s CMS Division.
1. Yves, can you give us some information about your technical background and history?
I have always been curious, wanting to understand how everything works and so naturally I ended up in physics, eventually specializing in elementary particles and high energy physics. I started my professional career as a physicist at CERN (European Organization for Nuclear Research) doing high energy physics research and writing beam steering applications for the particle accelerators. I transitioned from research to industry by first writing embedded software for digital oscilloscopes and then, in 1998 I co-founded Acqiris in order to bring high-speed digitizer technology to modular systems and personal computers.
Since joining Keysight Technologies as part of the Acqiris Operations at the end of 2006, I have also been active in the IVI Foundation and co-authored the IviDigitizer class specification as well as the AWG extensions of the IviFgen class specification.
2. Yves, what is your role as software technical leader of the CMS Division’s Digitizer Components?
My team of software engineers develops the driver used by our customers to control our digitizer modules, as well as the specific tools needed for their development. My role is to supervise this development, give technical advice for strategic decisions pertaining to software technology and make sure the developers have all the necessary knowledge, tools, and guidance to deliver the best possible software to run our products.
Since the beginning, we have chosen to support all our instruments with a unique driver, to simplify the combination of different models into a larger system, as well as make the upgrade to a new model a transparent operation for our users. Indeed, specific application software interfaces to the same driver interface and the only required step to integrate a new digitizer is a driver update. Furthermore, this driver is compliant with the IVI Foundation’s IviDigitizer class specification.
3. How do you define software quality?
It is my strong conviction that quality and performance – an integral part of quality – start with the design. Also, it is by now well-known and proven that agile methods yield the best results when it comes to delivering functional software on time. In that sense, we adopted mandatory code reviews several years ago: every line of code must be peer-reviewed before it is committed to our source repository. Implementation of unit tests is of course also required for each new function, method or property. We have full coverage of our driver API with unit tests (“black box” testing), and extensive internal unit tests (“white box” testing). By the way, API testing is part of the standard requirements for any IVI driver. In addition, the IVI standard sets testing requirements for the driver’s installer.
The FPGA development kit (FDK) launched back in June is the result of a long term relationship with Mentor Graphics. Today we have the chance to have Brian G. Oliver, Agilent Technologies Account Director to talk about the development of this partnership. As a reminder the FDK is now available. It allows Agilent digitizers customers to deploy their own signal processing IP on board of the Agilent high-speed ADC boards.
High-speed ADC Made easy (HSADC): Before anything could you please briefly introduce yourself, what is your education and professional background, what are your hobbies?
Brian Oliver(BO): I am a Global Account Director for Mentor Graphics. I live in Colorado. I received my Chemistry and Business degrees from Saginaw Valley State University and my MBA from the University of Michigan. READ MORE
Hello Giovanni, we are pleased to receive you today. You are FPGA developer and along with what has been exposed lately on this blog, some serious innovations were brought in and around the on-board data processing units (DPU) or more commonly called FPGA’s that the M9703A carries (the M9703A counts no less than 4 Xilink Virtex-6 FPGA’s each unit supporting the on-board signal processing of 2 channels).
Giovanni, before we start could you please briefly describe your background?
Well, I have a Master of Science in Digital Electronic from University of Pisa in Italy.
We have recently let our RD engineers speak about how they were seeing the different innovations that have been developed during the conception of the 12-bit AXIe digitizer which has been elected as the 2013 TM Best in Test in the product category “signal analyzer”. Here is a summary of the different posts.
Let’s continue our journey into the technology breakthroughs realized during the development of the Best in Test award Winner in signal analyzer the M9703A. Let’s meet with Eduardo who will take us on a tour around synchronization.
Eduardo, can you briefly describe your background before you joined Agilent?
I have spent most of my career working as digital designer on FPGAs and ASICs. READ MORE
Today, we receive Nicolas who has been concentrating on the development of the Trigger IC that has been implemented on the M9703A. This circuit was developed as part of a trigger circuitry which includes others elements as you will discover in this interview.
Hello Nicolas, tell us a bit more about yourself. Have you always been working in the development of IC?
Actually, I started my career in an automotive company, mainly doing software coding as well as CPLD firmware but this was not my cup of tee. I changed job and worked for a DSO company and was mainly involved in the design of Front-end, multi-chip-modules and also GaAs IC design. After this I completed a PhD at the Swiss federal institute of technology in the field of IC design in the area of RF power amplifier efficiency improvement. Since then, I have been working for Agilent mainly on IC design for time base, trigger circuit and vertical signal conditioning. Incidentally, I am also in charge of the full time base circuitry development, implementing our own IC. Having to implement a circuit in a real application always gives new ideas for improvement. READ MORE