Things are moving fast still. This week eesof and high-speed digitzer team made a joint announcement as the M9703A AXIe 12-bit high-speed digitizer/wideband digital receiver’s FPGA’s can now be accessed with SystemVue electronic design automation (EDA) environment.
Agilent Technologies Inc. (NYSE: A) today announced custom algorithm development capability for the M9703A AXIe 12-bit high-speed digitizer/wideband digital receiver’s on-board field programmable gate arrays (FPGA) using the SystemVue electronic design automation (EDA) environment. The M9703A’s advanced multi-channel capability is ideal for early system prototyping and test system development in the areas of radar and satellite, electronic warfare and advanced wireless massive-MIMO 5G research.
Combining the M9703A AXIe 12-bit high-speed digitizer/wideband digital receiver with the W1462BP SystemVue FPGA Architect creates an open FPGA environment for system architects and FPGA program designers. The software enables the creation of a complete and integrated design-to-test flow. The M9703A’s four Xilinx Virtex-6 FPGAs, with automatic push-button programming, makes custom on-board data processing possible.
“This solution provides our advanced wireless and electronic warfare customers not only a complete design flow, from conception to actual hardware prototyping, but also the flexibility required to adapt to evolving technology,” said Mark Pierpoint, general manager of Agilent’s Modular Solutions Division.
The M9703A digitizer/wideband digital receiver provides up to 1.4 GHz instantaneous analog bandwidth and exceptional measurement accuracy. The digital receiver’s built-in multi-module processing synchronization, with greater than 100 phase-coherent channels, makes it ideal for multichannel applications requiring simultaneous wide-bandwidth and high dynamic-range measurements on multiple channels. This includes radar emulation, test and calibration, and R&D validation in advanced MIMO and baseband-IQ applications.
The W1462BP SystemVue FPGA Architect enables system architects and algorithm developers to create innovative designs for wireless and aerospace/defense communications systems. The software dramatically reduces design time and verification effort for system architects and algorithm developers doing communications PHY system design.
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