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Embedding custom real-time processing in a multi-gigasample high-speed digitizer

Real-time data processing after analog-to-digital conversion at multi-gigasamples per second on digitized data can’t be performed on a host computer as the backplane is not fast enough to extract the samples at full speed. In addition, a modern multi-processor workstation can’t perform real-time operations at such rates. Hence, an FPGA with enough available resources for customization inside the acquisition module is the ideal solution to apply such real-time algorithms on the acquired data at full speed.

Reducing the amount of data produced, accelerating the algorithm’s execution, and improving the software application processing and analysis time are among the main reasons why a programmable device open for customization on the digitizer data path is required.

Furthermore, confidentiality is a sensitive topic, especially for aerospace and defense (A&D) applications and new wireless communication standards like 5G. An FPGA with modern encryption techniques is the ideal place to protect intellectual property (IP).

Engineers will come across a variety of alternative solutions if they wish to implement real-time data processing on a signal acquired with a high speed digitizer. Some of these solutions offer a basic approach providing strictly the minimum set of capabilities to customize the FPGA with limited or no support. Others have a more comprehensive approach providing everything that is required to quickly turn ideas into reality, including access to the full features and performance of the digitizer coupled with an extensive engineering service.

Hidden and upfront costs, time to market, guarantee of success, and continuous support are key elements in choosing between solutions.

Read more on Embedded magazine: http://www.embedded.com/electronics-blogs/say-what-/4442421/Giovanni-Lucia–Keysight-Technologies

To learn more about our FPGA development kit, please contact us at digitizers@keysight.com

Expanded use of FPGA Development Kit for the full range of High-Speed Digitizers

Keysight newsroom announces today an updated version of the U5340A FPGA development kit. The new version allows for expanded deployment of on board IP signal processing across the full range of Keysight PCIe high-speed digitizers and the 12-bit AXIe 8-channel wideband digital receiver/digitizer.

Real-time processing capabilities introduced to PCIe

The good thing about following our blog publications is that you will learn before everyone what is happening on the side of new technology introduction. Check our latest press release that will be published today. 

Simultaneous Acquisition and Readout (SAR) application

Today’s article is an application brief on simultaneous acquisition and readout using the U5340A FPGA development kit.  A complete example application note can be provided upon request and it includes the HDL source code, a building script and the control application

Best in test summary: RD engineers insider views

EngineersWe have recently let our RD engineers speak about how they were seeing the different innovations that have been developed during the conception of the 12-bit AXIe digitizer which has been elected as the 2013 TM Best in Test in the product category “signal analyzer”. Here is a summary of the different posts. 

 

Best in test #4: Trigger circuitry: 12ps rms of precision

NicolasToday, we receive Nicolas who has been concentrating on the development of the Trigger IC that has been implemented on the M9703A. This circuit was developed as part of a trigger circuitry which includes others elements as you will discover in this interview.

Hello Nicolas, tell us a bit more about yourself. Have you always been working in the development of IC?

Actually, I started my career in an automotive company, mainly doing software coding as well as CPLD firmware but this was not my cup of tee. I changed job and worked for a DSO company and was mainly involved in the design of Front-end, multi-chip-modules and also GaAs IC design. After this I completed a PhD at the Swiss federal institute of technology in the field of IC design in the area of RF power amplifier efficiency improvement. Since then, I have been working for Agilent mainly on IC design for time base, trigger circuit and vertical signal conditioning. Incidentally, I am also in charge of the full time base circuitry development, implementing our own IC. Having to implement a circuit in a real application always gives new ideas for improvement. READ MORE